FET 2 1909

This is a SE SEM image of the device die. The source bond wire (left) was fused open. The gate bond wire (right) was intact.

FET 1 1909

This is the source bond pad. This material (arrow) is fused gold-copper-silica-silicon.

The source bond wire is fused open suggesting excessive source current caused the failure.

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Diode fail 1868

This diode failed due to electrical overstress, likely reverse biasing greater than 1000V. The die fractured when it was de-processed. The melt-through site is indicated by the arrow. Quality issues may have been a factor including post and die attach solder voids, and potting voids, which would be expected to impact the maximum power capability of the diode causing it to fail at lower than rated conditions.

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